Omron CJ2H-CPU68 CPU Unit

Series#: Omron

Product Details

High-performance OMRON CJ2H-CPU68 and CJ2H-CPU67 CPU Units for the CJ-Series PLC platform.
Massive user memory: up to 400K steps (CJ2H-CPU68) and 250K steps (CJ2H-CPU67) for complex applications.
Ultra-fast processing: basic instruction execution time of 0.016 µs min. and special instructions at 0.048 µs min.
Supports up to 2,560 I/O bits and 40 Units total (CPU Rack + up to 3 Expansion Racks).
Rich memory areas including DM (32K words), EM (up to 25 banks × 32K words), and 4,096 timers/counters each.
Flexible operating modes (PROGRAM, MONITOR, RUN) and optional Memory Card support (128/256/512 MB).
100% Brand New & Original, securely packed and ready for reliable global shipping.

Specification

The OMRON CJ2H-CPU68 and CJ2H-CPU67 are flagship CPU units within the CJ-Series PLC family, engineered for demanding industrial automation tasks that require high-speed logic execution, extensive memory capacity, and robust system integration. These processors deliver exceptional performance with a minimum basic instruction time of just 0.016 µs, enabling precise control in high-speed machinery, packaging lines, and process automation. With user memory capacities ranging from 250K steps (CJ2H-CPU67) to 400K steps (CJ2H-CPU68), they support large-scale programs and complex data handling. The units feature a comprehensive I/O and memory architecture, including dedicated areas for synchronous data refresh, DeviceNet, and CPU Bus Units, ensuring seamless connectivity with OMRON’s extensive lineup of special I/O and network modules.

Item	CJ2H-CPU67	CJ2H-CPU68
User Memory	250K steps	400K steps
I/O Bits	2,560 bits (Normal Mode: 200 ms overhead; add 100 ms + transferred words × (0.33 ms or 0.87 ms) when using EtherNet/IP tag data links)
Overhead Processing Time	Included in I/O refresh timing (see above)
Execution Time	Basic Instructions: 0.016 µs min.; Special Instructions: 0.048 µs min.
Interrupt Task Startup Time	26 µs or 17 µs (with high-speed interrupt); Return to cyclic task: 11 µs or 8 µs
Max. Connectable Units	10 Units per CPU/Expansion Rack; 40 Units total per PLC
Max. Expansion Racks	3
I/O Area	2,560 bits (160 words): CIO 0000 to CIO 0159
Link Area	3,200 bits (200 words): CIO 1000 to CIO 1199
Synchronous Data Refresh Area	1,536 bits (96 words): CIO 1200 to CIO 1295
CPU Bus Unit Area	6,400 bits (400 words): CIO 1500 to CIO 1899
Special I/O Unit Area	15,360 bits (960 words): CIO 2000 to CIO 2959
DeviceNet Area	9,600 bits (600 words): CIO 3200 to CIO 3799; plus 3,200 bits (200 words): CIO 1300 to CIO 1499
Internal I/O Area	37,504 bits (2,344 words): CIO 3800 to CIO 6143 (not for external I/O)
Work Area	8,192 bits (512 words): W000 to W511; plus 8,192 bits (512 words): H000 to H511
Holding Area	Bits maintain ON/OFF status across power cycles; H512 to H1535 reserved for function block instances
Auxiliary Area	Read-only: 31,744 bits (1,984 words) – A0 to A447; Read/write: 16,384 bits (1,024 words) – A448 to A1471
Temporary Area	16 bits: TR0 to TR15
Timer Area	4,096 timer numbers (T0000 to T4095, separate from counters)
Counter Area	4,096 counter numbers (C0000 to C4095, separate from timers)
DM Area	32K words; Special I/O Units: D20000 to D29599; CPU Bus Units: D30000 to D31599
EM Area	32K words/bank × 25 banks max. (E00_00000 to E18_32767); bits addressable; force-set/reset supported (unit version 1.2 or higher)
Index Registers	IR0 to IR15 (for indirect addressing; can be task-specific or shared)
Cyclic Task Flag Area	128 flags
Memory Card	128 MB, 256 MB, or 512 MB (for program storage and data logging)
Operating Modes	PROGRAM (preparation), MONITOR (online editing), RUN (normal execution)
Execution Mode	Normal Mode

Memory Architecture: Extensive DM (32K words) and EM (up to 25 banks × 32K words) for data storage, with bit-level addressing capability.
Interrupt Handling: High-speed I/O and scheduled interrupts with startup times as low as 17 µs, enabling real-time response.
Network Integration: Built-in support for EtherNet/IP tag data links and DeviceNet, with dedicated I/O memory areas for seamless communication.
Expandability: Up to 40 Units total (CPU Rack + 3 Expansion Racks), accommodating a wide range of analog, digital, and special function modules.
Programming Flexibility: 128 cyclic task flags and 16 index registers for indirect addressing, allowing efficient code organization and data manipulation.
Data Retention: Holding Area bits retain status across power cycles, and EM Area supports force-set/reset for debugging and maintenance.
Memory Card Support: Optional 128/256/512 MB cards for program backup, recipe storage, or data logging without PC connection.